1. Field of the Invention
This invention relates to crystal oscillators and more particularly to crystal oscillators having peak detector amplitude control to accommodate a wide dynamic range of frequencies and a wide range of crystal specifications.
2. Description of Related Art
Oscillators, clocks and timers are essential to the performance of most modem electronic devices. Examples of devices that use oscillators, clocks and timers are commonplace. Digital timepieces (e.g., digital wristwatches), computers, videocassette recorders, televisions, cordless telephones and wireless communication devices (e.g., cellular phones, pagers and Internet-enabled personal digital assistants (PDAs)) all use timers to generate internal clock signals used by the devices. As is well known, timers and clocks typically use crystal oscillators to derive desired clockrate signal for use by electronic devices. Crystal oscillators are also utilized in electronic communication and navigation systems to establish transmitting and receiving operating frequencies.
A typical basic oscillator circuit is shown in FIG. 1 in block diagram form. Basic oscillators sustain oscillation signals using a closed-loop feedback system that is now described. The basic oscillator is designed to produce a continuous sine wave signal (i.e., oscillating signal) having an associated signal frequency. The associated signal frequency is determined by certain properties of the feedback network shown in FIG. 1. As shown in FIG. 1, the basic oscillator typically comprises an inverting amplifier 2 and a feedback network 4. The inverting amplifier 2 receives an input from a bias source (not shown). The inverting amplifier 2 outputs an amplified and inverted signal to an input of the feedback network 4 and to an output. The feedback network 4 outputs a feedback signal to the input of the inverting amplifier 2 and thus completes the closed-loop feedback system. An oscillator must meet certain criteria to operate properly.
Typically, a basic oscillator circuit must meet two design criteria to function properly. First, the oscillator's total loop gain ("T") must be equal to 1. Second, the oscillator's total phase shift must be equal to 0. The total loop gain T is the amplifier gain ("a") multiplied by the feedback gain ("f"). The value of the feedback gain is less than one. The amplifier gain ("a") represents the ratio of the output voltage versus the input voltage of the inverting amplifier 2 shown in FIG. 1. The total phase shift is the phase of the inverting amplifier 2 and the phase of the feedback network 4. The total phase shift can be represented mathematically as: arg(af)=0, where arg(af) is the phase angle of (af) in radians.
After initialization, an oscillator signal's amplitude grows steadily until reaching steady state. Steady state is achieved through a mechanism that limits the loop gain. Two mechanisms for limiting loop gain are "gain-limiting" in the amplifier element (in the form of non-linearities intrinsic to the device or clipping) or regulating gain in the circuit (in the form of amplitude regulation or AGC control methods). If loop gain is not limited, the amplitude grows infinitely. Under real world conditions, the initial loop gain must be greater than 1 to insure reliable oscillation operation. Typically, most oscillators have an initial loop gain value between 2 and 3. At steady state the amplitude of the oscillation amplitude reaches equilibrium (i.e., neither increases nor decreases) because the loop gain has reached equilibrium. Upon reaching steady state (i.e., stable oscillation), the total loop gain can be represented mathematically as: .vertline.af.vertline.=1.
As is well known in the electronics art, crystal oscillators utilize crystals to generate an oscillating signal. One type of crystal oscillator circuit that is well-known to those skilled in the oscillator design art is a "Pierce oscillator". A simplified schematic diagram of a Pierce oscillator is shown in FIG. 2a. A Pierce oscillator typically comprises an inverting amplifier 2, a crystal 6, a first capacitor 16 and a second capacitor 18. As shown in FIG. 2a, the inverting amplifier 2 and the crystal 6 are coupled in a shunt configuration having two nodes. The capacitors 16, 18 each have two nodes. One node of the capacitor 16 is coupled to a first node of the shunt configuration. The other node of the capacitor 16 is coupled to a common ground 90. Similarly, one node of the capacitor 18 is coupled to a second node of the shunt configuration. The other node of the capacitor 18 is coupled to the common ground 90. As before, the inverting amplifier 2 has an amplifier gain "a". The crystal 6 and capacitors 16 and 18 are analogous to the feedback network 4 of FIG. 1. The crystal loss can best be described by modeling the crystal 6 using an electrical equivalent.
The crystal 6 can be modeled by an electrical equivalent comprising an inductor, a capacitor, a resistor and a shunt capacitor. The Pierce oscillator of FIG. 2a is now described using a crystal model of the crystal 6. FIG. 2b is a simple schematic diagram of an electrical equivalent of the Pierce oscillator of FIG. 2a. The electrical comprises an inverting amplifier 2, a crystal model 6', a capacitor 16 and a capacitor 18. The Pierce oscillator representation of FIGS. 2a and 2b are substantially similar and thus common components are not described in detail herein. As shown in FIG. 2b, the crystal model 6' comprises an inductor 8, a capacitor 10, a resistor 12 and a capacitor 14. The inductor 8, capacitor 10 and resistor 12 are coupled in series as shown. The capacitor 14 is coupled to the series network in a shunt configuration.
In the crystal oscillator of FIG. 2b, the resistor 12 represents the Equivalent Series Resistance (ESR) of the crystal 6 of FIG. 2a. The loss of the crystal is represented by the ESR. As described above with reference to FIG. 1, a crystal oscillator must meet two criteria to function properly. First, the total loop gain ("T") of the oscillator must equal 1. The total loop gain T is the amplifier gain ("a") multiplied by the by the feedback circuit formed by crystal 6 and capacitors 16, 18. The total loop gain, T, can be represented mathematically as: .vertline.af.vertline.=1. Second, the total phase shift of the oscillator must equal 0. In the Pierce oscillator of FIGS. 2a and 2b, the total phase shift is the phase of the inverting amplifier 2, taken together with the phase of the crystal 6 (or 6' of FIG. 2b). In the Pierce oscillator the arg(a)=-180 and the arg(f)=-180. Thus, the total phase shift can be represented mathematically as: arg(af)=0, where arg(af) is the phase angle of (af) in radians.
The Pierce oscillator of FIGS. 2a and 2b initially operates by first applying a bias such that the total loop gain, T, (i.e., af) is greater than 1. As the amplitude of the output of the inverting amplifier 2 increases, the gain of the amplifier, "a" is reduced by limiting non-linearities within the inverting amplifier 2 until a steady-state of T=af=1 occurs. Two disadvantages are associated with the technique of limiting non-linearities in the amplifier.
One disadvantage is the introduction of unwanted side effects such as the clipping of signals, distortion and harmonics (harmonics lead to unwanted signal radiation that interferes with other signals). A second disadvantage of limiting non-linearities in the inverting amplifier is a waste of total loop gain. The total loop gain is wasted because a large amount of current must be supplied to the oscillator to ensure that the initial loop gain is greater than 1 for initialization, while the non-linearities limit the oscillation signal by distorting the amplifier. The non-linearities reduce the initial loop gain from a value greater than 1 to a steady state (or large signal) loop gain equal to 1. Other methods of oscillator design have been attempted using amplitude regulation instead of limiting non-linearities to produce oscillation signals without introducing the unwanted side effects described above.
Some methods of crystal oscillator design have been attempted whereby the total loop gain of the basic crystal oscillators are regulated using Automatic Gain Control (AGC) or amplitude regulation techniques. One such crystal oscillator having amplitude regulation is described in more detail in an article by Eric Vittoz and Jean Fellrath, entitled "CMOS Analog Integrated Circuits Based on Weak Inversion Operation", appearing in the IEEE Journal of Solid-State Circuits, Vol. SC-12, No. 3, published in June 1977, and hereby incorporated by reference herein for its teachings on crystal oscillators. Crystal oscillators having amplitude regulation (or AGC) operate by lowering the input current (i.e., the bias current) until a steady state is achieved. The term AGC (Automatic Gain Control) derives from the operation of the circuit because the gain of the circuit is automatically controlled through a closed-loop regulation technique. Because these type of oscillators use lowered bias currents, the disadvantages associated with the prior art Pierce oscillators described above are overcome because large signals are not produced. Specifically, the total loop gain of the oscillator is not wasted and the unwanted side effects such as clipping, distortion and harmonics are reduced. An exemplary crystal oscillator using amplitude regulation is now described.
FIG. 3 is a schematic of a crystal oscillator circuit having an amplitude regulation circuit. The circuit detail and AGC operation of FIG. 3 is described in more detail in the Vittoz article that has been incorporated by reference and is therefore not be described in more detail herein. As shown in FIG. 3, the crystal oscillator comprises a crystal resonator 20, an inverting amplifier 22 and an amplitude regulation circuit 24. The crystal resonator 20 and the inverting amplifier 22 are analogous to the feedback network 4 and the inverting amplifier 2 of FIG. 1, respectively. The amplitude regulation circuit 24 detects the amplitude of the oscillation signal, limits the total loop gain of the oscillator and lowers the bias current until the oscillator reaches a steady state.
One disadvantage associated with crystal oscillators having amplitude regulation as shown in FIG. 3 is that the amplitude regulation circuit 24 is specifically designed for only one particular frequency or crystal type. For example, one common frequency and crystal type is the 32.768 kHz crystal frequency commonly used in the digital watch industry. Thus, the crystal oscillator's dynamic range (i.e., the range of frequencies that the oscillator can accommodate) is limited by the use of amplitude regulation. Due to the operation of the amplitude regulation circuit, the oscillator can accommodate only a very narrow range of crystal types. Another disadvantage of the crystal oscillator described above and shown in FIG. 3 is introduced by the use of filters or capacitors. Specifically, three filters (i.e., a large capacitor and two smaller capacitors) are necessitated by the circuit design of FIG. 3. These filters add considerable size to the integrated circuit "real estate" or "chip area" (i.e., the amount of area a component such as a crystal oscillator requires on an integrated circuit consumed by the crystal oscillator).
Therefore, the need exists for a crystal oscillator apparatus that reduces the production of unwanted side effects such as the clipping of signals, distortion and harmonics. Further, the need exists for a crystal oscillator design that reduces total loop gain waste. Also, the need exists for a crystal oscillator apparatus that has a wide dynamic range (i.e., can accommodate a wide frequency range), and can support a broad range of crystal types. In addition, the need exists for a crystal oscillator apparatus that allows an initial bias current to be applied that can be very large yet that will not overdrive the crystal oscillator circuit and create excess signal harmonics. The need exists for a crystal oscillator apparatus that allows for large variations in Q and therefore permits use of low cost crystal resonators. The need exists for a crystal oscillator apparatus that includes means for controlling the amplitude of the oscillation signal produced by the crystal oscillator, thereby reducing the possibility of overdriving the crystal resonator, and consequently increasing the reliability of the crystal oscillator apparatus. Furthermore, a need exists for a crystal oscillator design that achieves the above-stated objects yet consumes less chip area as compared with the prior art crystal oscillator approaches. The present invention provides such a crystal oscillator apparatus.